I²C was developed by Philips many years ago as an inexpensive, low-bandwidth, short-range, bit-serial
bus for communication between integrated circuits on a board. I²C requires only two lines - clock and data. It is
assumed that each chip on the board already has power and ground. The clock and data lines are connected to all chips on
the bus, in a wired-or, party-line fashion. Bus loading is an issue, but repeaters are available. In fact, TILT400.Pro
uses a buffer to support longer cables and more loading on its I²C bus.
I²C bit rate is 100 kbits, with a high speed 400 kbit option. I²C busses are usually assumed to be master/slave
but the specification supports peer to peer topologies too.
I²C uses a non-destructive bitwise arbitration scheme vaguely similar to CAN.
As there is no chip select, all devices on a bus share the same two signal wires. Individual
devices are addressed by a device code, and an optional address within a device code.
This enables multiple, identical devices to coexist. Typically, three address lines are
available for a maximum of eight identical devices on the same I2C bus. The System Management
Bus (SMBus) interface for Advanced Configuration and Power Interface (ACPI) is based
on 100 KHz I²C. |